A NUMERICAL MODEL FOR I/Q MODULATION/DEMODULATION FOR AN FPGA-ENABLED SDR PLATFORM

Abstract

This paper presents a numerical model for I/Q modulation/demodulation implemented in Matlab. This numerical model serves as a starting point for the HDL/FPGA implementation of a baseband processor for a previously developed SDR platform. The numerical model verification is carried out by performing 4, 8, 64, and 256-point QAM transmission over an additive White Gaussian Noise Channel and by comparing numerical and theoretical bit error rates. A partial HDL implementation of the baseband processor is given: the baseband processor generates a 1MHz tone signal that is mixed by the RF fronted, generating a double sideband modulated signal.